CUDA Vibe Coding: Implement or Optimize a CUDA Kernel

Prompt Live "vibe coding" in an editor: the interviewer describes a CUDA task and expects you to quickly produce runnable CUDA code or optimize a kernel. Typical variants Implement a CUDA kernel plus host-side launch code for one of: Vector add/scale (AXPY) Matrix transpose Simplified LayerNorm / RMSNorm Simplified softmax Reduce sum / max What to cover Grid/block mapping rationale. Memory coalescing and potential bank conflicts. Use of shared memory / warp primitives (e.g., shuffle) and why. Correctness (bounds, alignment, handling arbitrary sizes). Performance discussion: occupancy, register pressure, minimizing global loads/stores. I/O (abstract) Inputs: device pointers + shape parameters (N or M×N, etc.). Output: write result tensor to device memory. Note: The original report doesn’t specify the exact operator and I/O details, so this summarizes the most common CUDA live-coding tasks.